G - Physics – 06 – F
Patent
G - Physics
06
F
G06F 13/40 (2006.01)
Patent
CA 2547502
A bus architecture (1, 23) with a central processing unit (3), a data line (5) and a number of bus users (6) is specified, the central processing unit (3) and the bus users (6) in each case being connected to the data line (5) via a bus interface (7). In this arrangement, the data line (5) is constructed as a ring the central processing unit (3) has two transceiver units (8, 9, 31, 32) which can be switched between transmit and receive mode, and is prepared for the clocked emission of the data intended for the bus users (6), the bus users (6) are successively connected to the data line (5), and comprise in each case a monitoring unit (43), which is connected to the associated bus interface (7) and which is designed for activating a transmit activity of the bus interface (7) only after receiving a synchronization message (60), and otherwise blocking this activity. Also specified is a method for exchanging data with such a bus architecture (1). A high fault tolerance, particularly when the data line is cut through, and error locating capability are achieved.
Hoche Peter
Orth Stefan
Diehl Avionik Systeme Gmbh
Fetherstonhaugh & Co.
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