Bus control gate array

Details Bus control gate array Bus control gate array

G - Physics

06

F

354/237

G06F 12/06 (2006.01)

Patent

CA 1252575

- 13 - Abstract of the Disclosure In a computer having a central processing unit (CPU), a common bus, a plurality of input and output devices which are connected to the common bus and which have an intrinsic I/O device address, individually, and a bus control gate array, the bus control gate array according to the present invention includes an I/O device address decoder. The I/O device address decoder comprises a plurality of gates and decodes an I/O device address supplied from the CPU to produce a control signal for selecting the designated I/O device thereto.

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