Bus translator

H - Electricity – 03 – M

Patent

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354/105

H03M 9/00 (2006.01)

Patent

CA 1234220

Abstract A circuit for coupling two dissimilar data buses together. Registers are provided to latch data on a parallel bus. Sequence control circuits triggered by transfers initiated by components on the parallel bus are used to gate the data in the registers to and from the serial bus as required by the type of data transfer occurring.

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