Cache buffered memory subsystem

Details Cache buffered memory subsystem Cache buffered memory subsystem

G - Physics

06

F

354/241

G06F 13/00 (2006.01) G06F 12/08 (2006.01)

Patent

CA 1181179

ABSTRACT OF THE DISCLOSURE A buffered cache memory subsystem is disclosed which features a solid-state cache memory connected to a storage director which interfaces a host channel with a control module controlling operation of a long-term data storage device such as a disk drive. The solid-state cache memory is connected to plural directors which in turn may be connected to differing types of control modules, whereby the cache is usable with more than one type of long-term data storage means within a given system. The cache memory may be field-installed in a preexisting disk drive storage system and is software transparent to the host computer, while providing improvements in overall operating efficiency. In a preferred embodiment, data is only cached when it is expected to be the subject of a future host request.

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