Cache memory control system

Details Cache memory control system Cache memory control system

G - Physics

06

F

354/241

G06F 12/08 (2006.01) G06F 11/07 (2006.01)

Patent

CA 1299767

Abstract of the Disclosure A cache memory control system includes a circuit for clearing valid bits of data and address data, both of which are stored in a cache memory, a circuit for outputting a signal representing valid bits are being cleared, and a circuit for changing the cache memory from cache access status to cache bypass status in response to the signal representing that the valid bits are being cleared.

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