Cavity-up-cavity-down multichip integrated circuit package

Details Cavity-up-cavity-down multichip integrated circuit package Cavity-up-cavity-down multichip integrated circuit package

H - Electricity

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356/143

H01L 25/04 (2006.01) H01L 23/13 (2006.01) H01L 23/538 (2006.01) H01L 25/065 (2006.01)

Patent

CA 1287413

-13- ABSTRACT OF THE DISCLOSURE CAVITY-UP-CAVITY-DOWN MULTICHIP INTEGRATED CIRCUIT PACKAGE A multichip integrated circuit package comprises a thin planar body which has top and bottom major surfaces. Conductors, for carrying electrical signals, are integrated into the body and include input/output terminals on one portion of the bottom surface. Downward-facing cavities for holding respective high power integrated circuit chips extend from another portion of the bottom surface into the body, and upward-facing cavities for holding respective low power integrated circuits extend from the top surface into the body. Small thermal resistance for the high power chips is achieved, and footprint is simultaneously minimized by locating the upward-facing cavities over the terminals.

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