H - Electricity – 04 – B
Patent
H - Electricity
04
B
H04B 7/216 (2006.01) H04B 1/707 (2006.01) H04J 13/04 (2006.01) H04Q 7/22 (2006.01)
Patent
CA 2223116
A CDMA chip synchronization circuit is provided for a mobile communications system employing a wide band CDMA method, for example a direct spread code division multiple access (DS-CDMA) method. The circuit is designed to perform detection of multipath receiving timing, particularly synchronous tracking, under a low Eb/No environment where multipaths are received in an overlapping manner. Herein, a radio receiver converts radio frequency signals to digital base band signals, and a search section detects receiving timing with respect to multipath components contained in the digital base band signals. The detected) receiving timing is used as a center position for receiving on a time axis. The radio receiver is connected with multipath receivers, each of which contains a number of correlators which produce correlation values between the multipath components and do-spreading codes which are delayed by different delay times respectively. Herein, the correlators correspond to prescribed intervals of time which deviate from the center position for receiving on the time axis. The correlator outputs are temporarily stored in a memory. The multipath receiver periodically selects a correlator output having a best receiving quality from among the correlator outputs for every prescribed interval of time corresponding to a pilot period. Synchronous detection is performed using the selected correlator output. Outputs of the multipath receivers are combined at a maximum ratio, so that receiving data is produced.
Corporation Nec
G. Ronald Bell & Associates
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