Cdma communication system in which bit rates are dynamically...

Details Cdma communication system in which bit rates are dynamically... Cdma communication system in which bit rates are dynamically...

H - Electricity

04

B

H04B 7/26 (2006.01) H04J 3/16 (2006.01) H04J 14/00 (2006.01) H04J 13/00 (2006.01) H04J 13/02 (2006.01)

Patent

CA 2224979

A CDMA communication system is provided in which bit rates are dynamically allocated by a single CDMA receiving station (RS) to a plurality of CDMA transmitting stations, (TS1, TS2 ...) all of which are intercoupled to each other over a CDMA channel (FB1) and a feedback channel (FB2). Each CDMA transmitting station (Fig.3) includes a control circuit (31, 32) which sends control signals (Fig. 2A) on the CDMA channel in spaced apart time intervals which request respective bit rates on the CDMA channel; and, the CDMA receiving station (Fig. 4) includes a bit rate allocating circuit (52 53, 54) which receives and responds to the control signals by sending feedback messages (Fig. 2B) over the feedback channel that address individual CDMA transmitting stations and grant respective bit rates to the addressed station. In one preferred embodiment, each transmitting station includes a data buffer (30) which stores a time varying number of data bytes that are to be sent, and each transmitting station requests respective bit rates on the CDMA channel by including that number in the control signals.

Système de télécommunications à accès multiple par différence de code (AMDC) dans lequel les débits binaires sont attribués dynamiquement par une station unique de réception AMDC (RS) à une pluralité de stations d'émission AMDC (TS1, TS2 ...), qui sont reliées en totalité les unes aux autres par l'intermédiaire d'un canal AMDC (FB1) et d'un canal de rétroaction (FB2). Chaque station d'émission AMDC comprend un circuit de commande (31, 32) qui envoie des signaux de commande sur le canal AMDC à des intervalles temporels espacés les uns des autres demandant des débits binaires respectifs sur le canal AMDC; la station de réception AMDC comprend un circuit d'attribution de débit binaire (52, 53, 54) qui reçoit les signaux de commande et répond auxdits signaux en envoyant des messages de rétroaction, par l'intermédiaire du canal de rétroaction, s'adressant aux stations individuelles d'émission AMDC et attribuant des débits binaires respectifs à ladite station individuelle. Dans un mode de réalisation préféré, chaque station émettrice comprend un tampon (30) de données qui mémorise un nombre variable dans le temps d'octets de données à envoyer et chaque station émettrice demande des débits binaires respectifs sur le canal AMDC en incluant ce nombre dans les signaux de commande.

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