B - Operations – Transporting – 32 – B
Patent
B - Operations, Transporting
32
B
356/5
B32B 3/00 (2006.01) C04B 35/111 (2006.01) C04B 41/50 (2006.01) C04B 41/87 (2006.01) H01L 23/15 (2006.01) H05K 1/03 (2006.01) H05K 3/00 (2006.01)
Patent
CA 1165459
P-403 CERAMIC SUBSTRATE FOR FINE-LINE ELECTRICAL CIRCUITRY AND METHOD OF MANUFACTURE ABSTRACT In accordance with the invention there is provided a sintered monolithic ceramic sub- strate for fine-line electrical circuitry, the substrate comprising a base layer containing at least 90% by weight crystalline alumina or beryl- lia and a thin upper layer containing at least 90% by weight crystalline material the same as that of the base layer but with an average grain size less than that of the crystalline material of the base layer, the upper layer having an irregular interface with the base layer but a planar upper surface with minimal surface irregu- larities for improved reception of the fine-line circuitry to be applied. Further in accordance with the invention such substrate is made by first forming and firing a ceramic plate of alumina or beryllia ceramic to provide the base layer and then applying and firing a coating of fine grain alumina or beryllia, as the case may be, on the plate to provide the upper layer.
391151
Giovanini Donald R.
Langman Richard A.
Letzig Michael P.
Coors Porcelain Company
Smart & Biggar
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