Channel data buffer apparatus for a digital data processing...

G - Physics – 06 – F

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

354/239

G06F 3/00 (2006.01) G06F 13/00 (2006.01) G06F 13/12 (2006.01)

Patent

CA 1102006

CHANNEL DATA BUFFER APPARATUS FOR A DIGITAL DATA PROCESSING SYSTEM Abstract of the Disclosure Channel data buffer apparatus for buffering data being transferred between an input/output channel unit and a main storage unit in a digital data processing system. In the disclosed embodiment, data is generally transferred between the channel unit and the data buffer (a "channel/buffer" transfer) in two-byte seg- ments and between the main storage unit and the data buffer (a "storage/buffer" transfer) in eight-byte segments. The data buffer is comprised of eight column- forming byte-wide multirow storage arrays each having its own address mechanism for accessing any desired row therein. Corresponding rows in the different storage arrays provide the corresponding eight-byte rows for the data buffer as a whole. For storage/buffer trans- fers, data buffer address circuitry is provided for enabling a group of eight contiguous bytes to be read out of or written into the data buffer on a single access even though some of the bytes may be located on one row of the data buffer and other of the bytes on the next row of the data buffer. For channel/buffer transfers, data buffer address circuitry is provided for enabling a group of two contiguous bytes to be read out of or written into the data buffer on a single access even though one of the bytes may be located on one row of the data buffer and the other of the bytes on the next row of the data buffer. For storage/buffer transfers, an eight-byte wrap-around data shifter is located between the data buffer and the main storage - 1 - unit for enabling any necessary alignment or realignment of the data being transferred. These features enable data to be loaded into the data buffer in a packed manner and without regard to the storage word boundary alignments in the main storage unit. Among other things, this minimizes the hardware needed for buffering the data and improves the data chaining capability of the system.

301808

LandOfFree

Say what you really think

Search LandOfFree.com for Canadian inventors and patents. Rate them and share your experience with other people.

Rating

Channel data buffer apparatus for a digital data processing... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Channel data buffer apparatus for a digital data processing..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Channel data buffer apparatus for a digital data processing... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFCA-PAI-O-567002

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.