Channel monitoring system

H - Electricity – 04 – J

Patent

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363/12

H04J 3/00 (2006.01) H04L 1/00 (2006.01) H04L 27/18 (2006.01)

Patent

CA 1106086

ABSTRACT OF THE DISCLOSURE A channel monitoring system for monitoring the bit error in a transmission channel transmitting PCM signals is disclosed. The system is a parity check system in which only one parity bit for one monitoring section of the PCM signal is necessary even for a transmission system employing dif- ferential modulation. The transmitter side of the system includes a series parallel converter, multiplexer and parity counter and the receiver side in- cludes a parallel series converter, demultiplexer and counter. In the system binary codes are converted in to differential binary codes. The binary codes are continuously parity-counted for the number of codes corresponding to a particular time slot but the subsequent binary codes are not parity-counted for the same number of codes corresponding to the time slot. One bit of the parity signal corresponding to the parity-counted codes is generated.

286884

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