H - Electricity – 04 – J
Patent
H - Electricity
04
J
363/10.1
H04J 3/02 (2006.01) H04L 1/24 (2006.01)
Patent
CA 1241777
Abstract of the Disclosure A channel quality monitoring apparatus provided in terminal equipment of digital radio communication system comprises a syndrome generator circuit responsive to a digital multiplexed signal of a receiving signal, a signal converter circuit for converting an error-corrected digital multiplexed signal into a digital multiplexed signal with which a predetermined parity detection is possible, a parity detector circuit for effecting a parity detection of the digital multiplexed signal from the signal converter circuit, and computing circuitry configured as an error rate detector circuit responsive to outputs from the syndrome generator means and the parity detector circuit. When occurrence of code error detected on the basis of the syndrome continues for the duration more than a predetermined time period, the computing circuitry is operative to compute an error rate of the receiving digital multiplexed signal on the basis of the syndrome. In contrast, when occurrence of code error detected continues for the duration equal to or less than the predetermined time period, the computing circuitry is operative to compute an error rate of the receiving digital multiplexed signal on the basis of the output from the parity detector circuit. Thus, this apparatus provides an improved detection accuracy of a channel error rate in the equipment of receiving and demodulating system.
493552
Corporation Nec
Smart & Biggar
LandOfFree
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