Charge skimming and variable integration time in focal plane...

Details Charge skimming and variable integration time in focal plane... Charge skimming and variable integration time in focal plane...

H - Electricity

01

L

H01L 27/14 (2006.01) H01L 27/148 (2006.01) H04N 3/15 (2006.01)

Patent

CA 2095739

CHARGE SKIMMING AND VARIABLE INTEGRATION TIME IN FOCAL PLANE ARRAYS ABSTRACT Methods and apparatus for implementing charge skimming and variable integra- tion time in focal plane arrays (10) formed in a silicon substrate (12). The present invention provides for pulsing a field plate (17) that lies over a diode (18) disposed in the substrate (12) in order to provide for charge skimming and variable integration time. The field plate (17) is normally dc biased to suppress diode edge leakage. No additional structure is needed in the silicon substrate (12), and basic readout clocking is unaffected. Any interline transfer focal plane array (10) can benefit from using the principles of the present invention.

Affiliated with

Also associated with

Rating

Charge skimming and variable integration time in focal plane... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Charge skimming and variable integration time in focal plane..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Charge skimming and variable integration time in focal plane... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-1834704