Chrominance signal correction

H - Electricity – 04 – N

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352/18.31

H04N 5/76 (2006.01) H04N 9/85 (2006.01)

Patent

CA 1054705

ABSTRACT In a video disc players, a recorded composite signal, recovered during disc playback, includes a chrominance signal component buried in the midband of the accompanying luminance signal component. The player includes video processing circuits converting the recovered signal to an output composite signal in which the chrominance signal component occupies a higher frequency band, and employing the step of heterodyning the recovered composite signal with oscillations at a nominal frequency of fs + fs' (where fs is the color subcarrier frequency of the output, and fs' is the buried color subcarrier frequency of the disc signal). To stabilize the output chrominance signal component against spurious frequency variations accompanying disc playback, a phase locked loop (PLL) system is established to cause the fs + fs' oscillations to track the disc frequency variations. The PLL system employs a voltage controlled oscillator (VCO) operating at a nominal frequency of ? fs - fs', and responding to the output of a phase detector, comparing the synchronizing burst component of the output chrominance signal with the highly stable output of a reference oscillator operating at fs. The VCO output is heterodyned with oscillations at ? fs, derived from the reference oscillator, to provide the desited oscillation output varying about fs + fs'. "Sidelock" under disc playback initiation conditions is avoided by limiting the hold-in range of the VCO. A sweep voltage input to the VCO is supplied under out-of-lock conditions to enable phase lock acquisition. Upon achievement of phase lock, sweep generation is disabled, and sweep voltage sweeps back to mid-range value with normal slope. -1- Sample-and-hold circuitry is employed in error voltage development, to enable PLL system to hold within rapid pull-in range during lengthy signal dropouts. -1a-

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