Circuit and method for input to failsafe "and" gate

H - Electricity – 03 – K

Patent

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H03K 19/007 (2006.01)

Patent

CA 2396060

A method for generating signals for input to a vital "AND" gate includes generating a plurality of independent signals for input to the "AND" gate and checking that each of the signals has a frequency and duty cycle within predetermined ranges. Upon a determination that one of the signals exhibits an inactive state or has a frequency or duty cycle outside the predetermined ranges, generation of another of the signals is stopped. This method eliminates a need for physical filters where the input signals are generated independently by computer subsystems.

L'invention concerne un procédé destiné à produire des signaux en vue d'une entrée dans une porte ET sûre. Ce procédé consiste à produire une pluralité de signaux indépendants en vue d'une entrée dans cette porte ET et à vérifier que chacun de ces signaux présente une fréquence et un cycle de service compris dans des limites prédéterminées. Si l'un des signaux présente un état inactif ou une fréquence ou un cycle de service sortant de ces limites prédéterminées, la production d'un autre signal est interrompue. Ce procédé permet de supprimer la nécessité de recourir à des filtres physiques où les signaux d'entrée sont produits indépendamment par des sous-systèmes informatiques.

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