Circuit and method for multiple match detection in content...

G - Physics – 11 – C

Patent

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G11C 7/06 (2006.01) G11C 15/00 (2006.01) G11C 15/04 (2006.01)

Patent

CA 2277717

The invention detects multiple matches between search and stored data in high high-density content addressable memories. An input signal is derived from the matchlines, such that the input signal starts discharging form a predetermined precharge level towards a discharge level determined by the number of match conditions. A reference signal is generated such that it starts to discharge at the same time from the same precharge level towards a reference level which falls between the two discharge levels corresponding to single and double match condition. A latching differential amplifier is activated shortly thereafter to compare the input signal with the reference signal and thereby provide an indication whether a multiple single or no match occurs on the matchlines, after which the amplifier is deactivated. The disclosed circuit features a relatively fast detection with low current consumption.

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