Circuit arrangement for microcomputer

G - Physics – 06 – F

Patent

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354/231

G06F 13/40 (2006.01)

Patent

CA 1308814

ABSTRACT OF THE DISCLOSURE To speed up data transfer one embodiment of the invention features a transmission gate arrangement which pre- charges and transfers data in internal and external buses with with the same timing and which further intializes the internal bus and a device such as an ALU, every bus cycle. A second embodiment speeds the data transfer in the buses per se by providing two data transfer paths through the interconnected buses and reducing the combined resistances of the internal and external buses in the order of 50%.

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