Circuit arrangement for reading out and regenerating items...

Details Circuit arrangement for reading out and regenerating items... Circuit arrangement for reading out and regenerating items...

G - Physics

11

C

352/82

G11C 7/00 (2006.01) G11C 11/406 (2006.01)

Patent

CA 1141858

ABSTRACT OF THE DISCLOSURE A circuit arrangement is disclosed for reading out and regener- ating items of information stored in one-transistor storage elements. For read-out, storage elements addressed by the activation of a word line transfer an existing information charge into assigned bit lines, and wherein the bit lines influence inputs of assigned read-out/regenerating amplifiers. The storage density of semiconductor stores is increased by providing a circuit arrangement in which the disproportion in terms of area between technologically realizable storage matrices and the required amplifiers which is a by-product of the miniaturization of stores of the above mentioned type does not occur. A group of m bit lines are in each case combined to form groups and are consecutively connected via a multiplexer to a common read-out/regenerating amplifier.

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