Circuit, control system, control method and...

H - Electricity – 03 – L

Patent

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Details

H03L 7/107 (2006.01) H03L 7/08 (2006.01) H03L 7/093 (2006.01)

Patent

CA 2755962

In order to provide a circuit which can realize high-speed frequency tracking performance while satisfying jitter/wander suppression performance, the circuit controls loop gain of a PLL means, which extracts a clock signal of a SDH signal or an Ethernet signal from an OTN signal, on the basis of a result of processing a jitter/wander component and a frequency change state on the basis of phase comparison data of the PLL means.

L'invention porte sur un circuit capable d'atteindre de hautes performances de suivi de fréquence tout en satisfaisant certaines performances de suppression de gigue/dérapage. Le circuit commande le gain de boucle d'un moyen à boucle de verrouillage de phase (PLL) (100) en fonction des résultats de traitement d'une composante de gigue/dérapage et d'un état de changement de fréquence (300) sur la base des données de comparaison de phase du moyen PLL (100). Ledit moyen PLL (100) est un moyen servant à reproduire un signal de hiérarchie numérique synchrone (SDH) ou un signal Ethernet à partir d'un signal de réseau de transport optique (OTN).

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