Circuit device and method of measuring clock jitter

H - Electricity – 03 – M

Patent

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Details

H03M 1/50 (2006.01)

Patent

CA 2695373

In an embodiment, a method is disclosed that includes receiving a clock signal at a delay chain of a circuit device and determining a value of the clock signal at a selected point within the delay chain. The method also includes adjusting the selected point when the value does not indicate detection of an edge of the clock signal.

La présente invention concerne, dans un mode de réalisation, un procédé qui comprend la réception d'un signal d'horloge à une chaîne à retard d'un dispositif de circuit et la détermination d'une valeur du signal d'horloge à un point sélectionné dans cette chaîne à retard. Le procédé comprend aussi le réglage du point sélectionné lorsque la valeur n'indique pas la détection d'un bord du signal d'horloge.

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