Circuit for detecting a missed commutation in a self-...

H - Electricity – 02 – H

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321/51

H02H 7/122 (2006.01) H02M 7/515 (2006.01)

Patent

CA 1093153

41GC 3019 ABSTRACT OF THE DISCLOSURE A circuit for detecting a missed commutation in an inverter. The circuit includes a detector coupled to the center tap of a commutating interval current limiting reactor which is connected in series with and interposed between a pair of gate controlled rectifiers for generating a first signal upon detecting and for the duration of an interval when both of the rectifiers are ON. The circuit further provides a signal processing arrangement, responsive to a first pulse used to initiate an interval when either of the pair of rectifiers is to be "ON", for generating a second signal. Also provided is a gating arrangement responsive to the first and second signals for generating a control signal to cause cessation of the operation of the inverter, is the first signal is absent during the total occurrence of the second signal.

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