Circuit for rapidly resynchronizing a clock

H - Electricity – 04 – L

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328/87

H04L 7/02 (2006.01) H03L 7/099 (2006.01) H04L 7/033 (2006.01)

Patent

CA 1137567

PHF 79/504 ABSTRACT: A circuit for rapidly resynchronizing a clock with an external clock. The clock to be synchronized obtained at the output of a phase-locked loop by divid- ing the frequency of a reference clock in a frequency divider whose division factor is controlled by a phase controller detecting the deviation between the trans- itions of the two clocks to be synchronized. According to the invention, the pulses of the reference clock are applied to the phase-locked loop by means of a gate, connections having been provided to render this gate non- conductive by means of the characteristic transition of the clock to be synchronized which follows the appearance of a resynchronizing control signal, and for thereafter rendering this gate conductive by means of a character- istic transition of the external clock. Used in data transmission.

344832

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