H - Electricity – 04 – J
Patent
H - Electricity
04
J
H04J 3/02 (2006.01) G11C 7/00 (2006.01)
Patent
CA 2064272
A circuit managing numbers of accesses to logic resources, such as buffer memory data cells in a time switching system. The circuit is structured around a counting cell matrix. Each counting cell includes a synchronous counter storing an instananeous number of accesses relating to a corresponding data cell of the buffer memory. This encoded access number is representative of the number of outgoing multiplex ways from the system to which a data block received on an incoming multiplex way in the system must still be diffused. A given circuit operating cycle includes the loading of a counter by an access number corresponding to a free data cell address, supplied by matrix column and row encoders during a cycle preceding the given cycle. This loading is obtained by selecting a column and row by cell-to-be-charged column and row decoders, and by applying the encoded access number to an input bus of the counters in the cells. Simultaneous to loading, an updated encoded number of a counter in a second matrix cell is decremented by one unity in response to the read-out address applied to cell-to-be-decremented address column and row decoders when the buffer memory cell corresponding to the second cell is being read.
Andre Alain
Majos Jacques
Teyssier Henri
France Telecom
Swabey Ogilvy Renault
LandOfFree
Circuit managing numbers of accesses to logic resources does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Circuit managing numbers of accesses to logic resources, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit managing numbers of accesses to logic resources will most certainly appreciate the feedback.
Profile ID: LFCA-PAI-O-1717039