Circuitized substrate and method of making same

H - Electricity – 05 – K

Patent

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Details

H05K 3/46 (2006.01) H05K 3/07 (2006.01) H05K 3/42 (2006.01)

Patent

CA 2457299

A method of making a circuitized substrate in which a commoning layer is used to form multiple, substantially vertically aligned conductive openings in a multilayered component such as a laminate interposes for coupling a chip to a printed circuit board or the like. The structure, including such a chip and circuit board is ideally suited for use within an information handling system.

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