Clamping video signals

Details Clamping video signals Clamping video signals

H - Electricity

04

N

350/40, 350/56

H04N 5/18 (2006.01)

Patent

CA 1184289

ABSTRACT: A video signal clamping circuit comprises a sum- ming circuit, an analogue-to-digital converter, a program- mable read only memory, a latch, a digital-to-analogue converter and an integrator. The PROM is addressed by the analogue-to-digital converter and produces a 4 bit output code which is dependent on the amplitude of the video sig- nal. This is stored on the latch and passed to the digital- to-analogue converter during a timing pulse applied to a terminal which occurs during the line blanking period. The digital-to-analogue converter produces an output which is stored on a capacitor in the integrator. The integrator output is summoned with the input video signal to clamp the video signal level to the reference voltage so that a clamped digital video signal is available from the output.

411095

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