Clock check circuit

H - Electricity – 03 – K

Patent

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340/74

H03K 5/135 (2006.01) H03K 5/14 (2006.01) H03K 5/19 (2006.01)

Patent

CA 1159533

TITLE CLOCK CHECK CIRCUIT ABSTRACT OF THE INVENTION An apparatus adapted to check for the con- tinuous presence of an incoming clock pulse train comprising an exclusive OR gate, to the input of which are coupled the clock pulse train and a second train of clock pulses delayed by one half the period of the incoming clock pulse train. A third train of clock pulses delayed by three quarters of the clock period is utilized to strobe the OR gate output into a pair of flip-flops. If the two inputs to the OR gate are the same a fault exists and a flip-flop is set to indicate on which excursion the fault occurred.

365760

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