Clock memory for digital data communications system

Details Clock memory for digital data communications system Clock memory for digital data communications system

H - Electricity

04

L

340/72

H04L 27/14 (2006.01) H04L 27/144 (2006.01)

Patent

CA 1125403

CLOCK MEMORY FOR DIGITAL DATA COMMUNICATIONS SYSTEM ABSTRACT OF THE INVENTION A digital data communications system including control techniques and circuitry for providing ternary detection; that is, mark, space, mark or space indeterminate states. The indeterminate state is useful in preventing synchronism loss during momentary propagation disturbances and to provide tighter system control.

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