Clock pulse tolerance verification circuit

Details Clock pulse tolerance verification circuit Clock pulse tolerance verification circuit

H - Electricity

03

K

328/88

H03K 5/00 (2006.01) H03K 5/26 (2006.01)

Patent

CA 1171919

TITLE CLOCK PULSE TOLERANCE VERIFICATION CIRCUIT ABSTRACT OF THE DISCLOSURE A circuit arrangement for comparing a clock pulse train against a standard pulse train. The cir- cuit includes an exclusive OR gate to which are in putted the pulse train to be tested, and a latch at the output of the gate, operated only upon a mismatch of the two pulse trains. Provision is also made to prevent operation of the latch within certain adjust- able tolerance parameters as to pulse width and posi- tion of the pulse train.

393018

Affiliated with

Also associated with

Rating

Clock pulse tolerance verification circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Clock pulse tolerance verification circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Clock pulse tolerance verification circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-1211402