Clock recovery circuit

Details Clock recovery circuit Clock recovery circuit

H - Electricity

04

L

H04L 7/00 (2006.01) H04J 3/06 (2006.01)

Patent

CA 2158879

A clock recovery circuit is coupled to an elastic storage circuit such as a FIFOcircuit. More specifically, a first input of the elastic storage circuit is electrically connected to an output of the clock recovery circuit. A second input for accepts a data signal representing an input data stream from a communications medium. A third input accepts a local clock signal. The resultant circuit may be used in receiver's for communications systems to help alleviate the problems of frequency mismatch and jitter.

Affiliated with

Also associated with

Rating

Clock recovery circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Clock recovery circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Clock recovery circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-1923288