H - Electricity – 04 – J
Patent
H - Electricity
04
J
363/11, 340/84
H04J 3/06 (2006.01) H04L 7/033 (2006.01)
Patent
CA 1146648
ABSTRACT Disclosed is a clock recovery circuit which improves the S/N of recovered clocks and improves line efficiency. The circuit comprises an oscillator having a frequency substantially equal to the clock frequencies of bursts issued by more than one station. A phase difference detection circuit detects phase differences between the clock extracted from each of the bursts and the output from the oscillator. An averaging circuit averages the phase differences detected during an interval designated by a first control signal. A memory circuit stores the averaged phase difference in response to a second control signal and reads out the stored phase difference in response to a third control signal. A control circuit generates the first to third control signals in response to the output from the oscillator. A phase shift circuit phase-shifts the output from the oscillator based on the phase difference read out from the memory circuit and thereby generates a recovery clock. The clock of the first burst corresponding to the stored phase difference is used as the clock for a second burst from the station which is the same as the station of the first burst and occurring after at least one burst after said first burst.
359430
Hata Masaharu
Kato Kotaro
Nippon Electric Co. Ltd.
Nippon Telegraph & Telephone Public Corporation
Smart & Biggar
LandOfFree
Clock recovery circuit for burst communications systems does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Clock recovery circuit for burst communications systems, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Clock recovery circuit for burst communications systems will most certainly appreciate the feedback.
Profile ID: LFCA-PAI-O-697258