G - Physics – 06 – F
Patent
G - Physics
06
F
G06F 1/04 (2006.01) G06F 1/06 (2006.01) H03L 7/23 (2006.01)
Patent
CA 2328024
The device serves for converting a clock signal (TS1) into a a second clock signal (TS2) having a different clock rate, in order to be able to convert a first data signal (DS1) into a second data signal (DS2) having an altered data rate. Controlling the frequency dividers particularly in the feedback path of the phase-locked loops enables matching to the different data rates and conversion between both data signals DS1 into DS2, or DS2 into DSl.
Aktiengesellschaft Siemens
Fetherstonhaugh & Co.
LandOfFree
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