Clock synchronizing circuit including a voltage controlled...

Details Clock synchronizing circuit including a voltage controlled... Clock synchronizing circuit including a voltage controlled...

H - Electricity

04

L

331/35

H04L 7/02 (2006.01) H04L 7/027 (2006.01)

Patent

CA 1283956

ABSTRACT There is described a clock synchronizing circuit which is capable of producing a clock signal with a minimum of jitter without resorting to the use of a limiter circuit. Accordingly, the size of the circuit and, therefore, the costs can be reduced. The clock synchronizing circuit includes first circuitry for separating a clock component from a digital modulated wave or a demodulated signal of the digital modulated wave and filtering the clock component. Second circuitry is provided for sampling the output of the first circuitry responsive to a given clock signal to produce a two-level signal. A voltage controlled oscil- lator is provided for generating the clock signal with the phase and frequency of the voltage controlled oscillator controlled by the output of the second circuitry.

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