Cmos digital circuits with resistive shunt feedback amplifier

Details Cmos digital circuits with resistive shunt feedback amplifier Cmos digital circuits with resistive shunt feedback amplifier

H - Electricity

03

K

328/95

H03K 19/08 (2006.01) H03K 5/02 (2006.01) H03K 19/017 (2006.01) H03K 19/0948 (2006.01) H03K 19/21 (2006.01)

Patent

CA 1047608

CMOS DIGITAL CIRCUITS WITH RESISTIVE SHUNT FEEDBACK AMPLIFIER ABSTRACT OF THE DISCLOSURE: A negative shunt feedback amplifier is disclosed for connection to the output node of a complex complementary metal oxide semiconductor logic circuit to increase the performance and reduce the FET device size. A CMOS inverter is coupled to the amplifier to restore the logic levels and to form the logic output. A first embodiment of the invention uses a resistor feedback and a second embodiment of the invention uses parallel N-channel and P-channel FETs to form the feedback impedance. The circuit has application in environments where a logic function requires a large number of FET devices resulting in a large output node capacitance and, thereby slowing the logic speed, as for example in a large DOT-OR circuit or at each output of a FET memory array.

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