Cmos integrated circuit

H - Electricity – 01 – L

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H01L 27/092 (2006.01) H01L 27/02 (2006.01) H01L 27/118 (2006.01)

Patent

CA 2090265

PHN 13996 16.06.1992 ABSTRACT: CMOS integrated circuit. An important problem in large integrated circuits is constituted by noise superimposed on the supply. This noise is particularly caused by switching of switching elements such as flipflops, and by heavily loaded output stages. These elements cause current peaks which may give rise to comparatively great fluctuations in the voltage. This problem is solved at least to a great extent in CMOS circuits with standard cells or with custom layout blocks by means of an additional decoupling capacitance in the form of an extra well in the routing channels The decoupling capacitance may be positioned immediately adjacent the switching element, which is favourable for suppressing the supply noise. Since the routing channels are generally not used anyway for providing circuit elements, the chip surface area is not or substantially not increased by this extra capacitance. Fig. 3.

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