Cmos level shift circuit with active pull-up and pull-down

Details Cmos level shift circuit with active pull-up and pull-down Cmos level shift circuit with active pull-up and pull-down

H - Electricity

03

K

328/128

H03K 19/00 (2006.01) H03K 3/356 (2006.01)

Patent

CA 1321628

Abstract of the Disclosure: A CMOS level shift circuit with active pull-up uses a pair of pull up transistors activated during the period when an output node needs to be rapidly pulled up. The pull up transistors are activated by the outputs of a combinatorial logic or memory circuit detecting when a change of input signal has occurred and activating the respective pull up transistor to bring the output to the proper state.

614925

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