Combined circuit and packet switching system

H - Electricity – 04 – Q

Patent

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344/25

H04Q 11/04 (2006.01) H04J 3/16 (2006.01)

Patent

CA 1269158

COMBINED CIRCUIT AND PACKET SWITCHING SYSTEM Abstract Apparatus for and a method of inserting circuit switch information and packetized data into different time slots of a time division multiplexed bus. A memory having a location individual to each time slot is written with information specifying whether the time slot individual to each location is to serve the circuit switch information or the packet data. The readout of each memory location during the occurrence of it's associated time slot controllable effects the application of either the circuit switch information or the packet data to the bus.

529904

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