Combined synchronous and asynchronous memory controller

Details Combined synchronous and asynchronous memory controller Combined synchronous and asynchronous memory controller

G - Physics

06

F

354/235

G06F 13/16 (2006.01) G06F 13/42 (2006.01)

Patent

CA 2027947

COMBINED SYNCHRONOUS AND ASYNCHRONOUS MEMORY CONTROLLER Abstract of the Disclosure A memory controller has an asynchronous portion and a synchronous portion. The synchronous portion is used when the system processor is accessing the memory, while the asynchronous portion is used when control of the memories is held by a DMA controller or a bus master located on a standardized bus.

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