Command stacking apparatus for use in a memory controller

G - Physics – 06 – F

Patent

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354/241

G06F 9/46 (2006.01) G06F 13/18 (2006.01)

Patent

CA 1132716

ABSTRACT OF THE DISCLOSURE This relates to a stacking apparatus for use in a data processing system memory controller. Instructions or commands requesting access to memory are accepted and temporarily stored in the stack if such memory is unavailable. Each new instruction or command is stored in the lowest unoccupied level of the stack. Associated with each stack level is a busy flip-flop which is set when a command or instruction is stored in its associated stack level. The busy flip-flop is reset when the command or instruction is passed on to its destination memory. The level busy flip- flops are monitored to detect when the stack is full thus indicating that further requests be inhibited. By monitoring the highest level in the stack that is occupied, a measure of throughput can be achieved in order to determine whether the stack should be enlarged or made smaller, 5202629

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