Commander node method and apparatus for assuring adequate...

Details Commander node method and apparatus for assuring adequate... Commander node method and apparatus for assuring adequate...

G - Physics

06

F

354/230

G06F 9/46 (2006.01)

Patent

CA 1301356

COMMANDER NODE METHOD AND APPARATUS FOR ASSURING ADEQUATE ACCESS TO SYSTEM RESOURCES IN A MULTIPROCESSOR COMPUTER SYSTEM ABSTRACT A multiple node computer system includes processor nodes, memory nodes, and input/output nodes interconnected on a pended bus. The system includes a lockout indicator which is set upon receipt of a locked response message by a processor node from a memory node in response to an interlock read command. The processors include a lockout check circuit re- sponsive to the condition of the lockout indicator and will re- strict generation of additional interlock read commands according to a predetermined access gating criterion until the lockout indicator is reset. In this manner, processor nodes of the system are assured equitable access to a memory node.

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