Communication multiplexer having dual microprocessors

Details Communication multiplexer having dual microprocessors Communication multiplexer having dual microprocessors

G - Physics

06

F

354/233, 340/84

G06F 13/00 (2006.01) H04J 99/00 (2009.01) G06F 13/24 (2006.01) G06F 13/38 (2006.01) G06F 15/00 (2006.01) G06F 15/167 (2006.01)

Patent

CA 1169574

ABSTRACT OF THE DISCLOSURE A data processing system includes a communication subsystem having an I/O microprocessor for communicating with a central processing unit and a main memory; and a line microprocessor for communicating with a number of devices. The I/O microprocessor and the line microprocessor communicate with each other through mailboxes stored in a shared memory. The line microprocessor interrupts the I/O microprocessor to process data bytes being transferred between main memory and a device requesting service when the line microprocessor has responded to the requesting device and loaded the mailbox.

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