Communications architecture and buffer for distributing...

G - Physics – 06 – F

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G06F 13/14 (2006.01) H04H 1/02 (2006.01)

Patent

CA 2181243

A store-and-forward architecture which stores and distributes information programs to subscribers includes: information warehouses which archive information programs and dispense information programs in segments to central offices in bursts; central offices which manage subscriber's requests for service and buffer segments of information programs for delivery to subscribers in real-time under the subscriber's interactive control, and customer premises equipment. The central offices employ CO buffers, and each CO buffer includes: processors (402, 405), for administering internal buffer operations and processing subscribers requests based upon the service presentation script and a program presentation map- interfaces (43, 46) for providing external access; busses (411, 412) for internal transport; buffer storage (403, 404) for storing segments of information programs; and memory storage (407, 413) for storing the script and map.

Une architecture de mémorisation et de distribution qui mémorise et distribue des programmes d'informations à des souscripteurs comprend: des dépôts d'informations qui archivent des programmes d'informations et fournissent par rafales des segments de programmes d'informations à des centraux; des centraux qui gèrent les demandes de services faites par les souscripteurs et les segments de mémoire intermédiaire de programmes d'informations, pour les fournir aux souscripteurs en temps réel sous le contrôle interactif du souscripteur; et un équipement basé chez les clients. Les centraux ont des mémoires intermédiaires centrales et chaque mémoire intermédiaire centrale comporte: des processeurs (402, 405) pour administrer les opérations internes des mémoires intermédiaires et pour traiter les demandes des souscripteurs basées sur des macroinstructions de présentation de services et un plan de présentation de programmes; des interfaces (43, 46) permettant un accès externe; des bus (411, 412) pour le transport interne; des mémoires intermédiaires (403, 404) pour enregistrer des segments de programmes d'informations; et une mémoire de stockage (407, 413) pour conserver la macroinstruction et le plan.

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