Communications processor architecture

Details Communications processor architecture Communications processor architecture

G - Physics

06

F

354/237

G06F 13/00 (2006.01) G06F 13/34 (2006.01) G06F 13/38 (2006.01)

Patent

CA 1106073

ABSTRACT A communications processor is coupled between a main memory and a plurality of communications channels and with a central processing unit and includes control mechanisms for processing the transfer of information between the processor and the main memory with minimum interruption of the central processing unit. The processor further includes control tables and a plurality of control routines enabling the processing of the transfer of the information between the processor and the channels. The routines are unique to the communications channel characteristics of the device coupled with the channel being serviced and is configurable to reflect any changes made in such characteristics. -l-

293535

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