H - Electricity – 04 – L
Patent
H - Electricity
04
L
H04L 1/00 (2006.01) H04L 12/26 (2006.01) H04L 12/56 (2006.01) H04Q 11/04 (2006.01)
Patent
CA 2059396
In a device for checking a header error in a header part of an STM (synchronous transfer mode) signal (S) which part comprises first through P-th header blocks and an HEC (header error check) block, each header block comprising first through N-th ATM (asynchronous transfer mode) cell header units, the HEC block comprising first through N-th ATM cell HEC units, a sole error checking section (33, 35, 37) checks the header error in connection with an n-th ATM cell header unit of a p-th header block and an n-th ATM cell HEC unit when a collective control signal indicates the n-th ATM cell header unit of the p-th header block and the n-th ATM cell HEC unit, where n is variable between 1 and N, both inclusive, p being variable between 1 and P, both inclusive. A signal producing section (15) produces the collective control signal for indicating successively the first through the N-th ATM cell header units of the first through the P-th header blocks and subsequently successively the first through the N-th ATM cell HEC units. On monitoring an ATM cell of a preselected number of bytes, the ATM cell may be converted into a converted cell of the preselected number of bytes plus an empty byte at first. Subsequently, an error correcting code is calculated from the preselected number of bytes of the converted cell and is placed in the empty byte to form a full cell.
Miyazono Takashi
Yamashita Hiroshi
Corporation Nec
Smart & Biggar
LandOfFree
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