Compensation element for dynamic semiconductor stores, and...

G - Physics – 11 – C

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G11C 7/00 (2006.01) G11C 11/404 (2006.01) G11C 11/4099 (2006.01)

Patent

CA 1054712

ABSTRACT The invention relates to a dummy cell for a dynamic semiconductor store, employing an evaluator circuit and con- nected therewith bit lines and storage elements adapted to be selectively connected therewith. The dummy cell may be selected through a dummy cell selector line and in its selected stage is connected to any bit line which is not busy with the read-out of a storage element. The dummy cell comprises a dummy cell condenser through which any connected bit line re- ceives a correcting voltage raising its potential to a middle potential of UBD= 0.5 (UBO+ UBl). UBO corresponds to the read-out voltage on the bit line during the read-out of a binary "O" and UBl corresponds to the read-out voltage on the bit line during the read-out of a binary "1". This mode of operation increases the read-out sensitivity.

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