Complementary mis device

H - Electricity – 01 – L

Patent

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Details

H01L 27/092 (2006.01) H01L 21/8238 (2006.01)

Patent

CA 2438214

A CMOS device comprises a structure formed on the (100) face of a silicon substrate and having another crystal face, and a p-channel MOS transistor and an n-channel MOS transistor each having a high-quality gate insulating film formed on the structure by microwave plasma processing and a gate electrode formed on the gate insulating film. The dimensions and shape of the structure are so set that the carrier mobility in the p-channel MOS transistor and that in the N-channel MOS transistor are balanced.

L'invention concerne un dispositif CMOS comprenant : une structure formée à la surface (100) d'un substrat en silicium et présentant une surface de cristal, un transistor MOS à canal P et un transistor MOS à canal N comprenant respectivement une couche d'isolation de grille de qualité élevée formée sur la structure au moyen d'un traitement au plasma hyperfréquence et une électrode de grille formée sur ladite couche d'isolation de grille. Les dimensions et la forme de la structure sont définies de façon que la mobilité du support dans le transistor MOS à canal P et le transistor MOS à canal N soit équilibrée.

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