Complementary transistor semiconductor device

H - Electricity – 01 – L

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H01L 27/098 (2006.01) H01L 27/06 (2006.01) H01L 29/201 (2006.01) H01L 29/36 (2006.01) H01L 29/778 (2006.01)

Patent

CA 2092895

14 ABREGE DISPOSITIF SEMICONDUCTEUR A TRANSISTORS COMPLEMENTAIRES. L'invention décrit un système à au moins deux transistors complémentaires, à canaux n et p, mais comportant une hétérostructure entre matériaux III-V. Afin d'équilibrer les tensions de seuils dans les deux canaux n (2 DEG) et p (2GHG), au moins deux plans de dopage p (19) et n (20) sont inclus dans deux couches de l'hérostructure, à des niveaux compris entre les canaux (2 DEG, 2 DHG) et les électrodes de grilles (7,8). Le plan de dopage n (20) est ensuite supprimé par gravure localisée à l'aplomb du transistor à canal p. Application à la logique rapide. Figure 5.

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