Complementary transistor structure and method for manufacture

H - Electricity – 01 – L

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

356/34

H01L 21/22 (2006.01) H01L 21/225 (2006.01) H01L 21/74 (2006.01) H01L 21/8222 (2006.01) H01L 27/082 (2006.01) H01L 29/08 (2006.01)

Patent

CA 1142267

Complementary Transistor Structure and Method for Manufacture Abstract Complementary, vertical bipolar NPN and PNP transistors are fabricated on the same monolithic semiconductor substrate which have matched high performance characteristics. A method for fabri- cating such complementary devices is also provided. In the method, a barrier region of a first conduc- tivity type is formed on the surface of the mono- crystalline semiconductor substrate doped with a second conductivity type. After an annealing heat treatment to drive in the doping ions of the barrier region, a collector region for one of the comple- mentary transistors of a second conductivity type is formed within the barrier region. It is convenient to simultaneously form isolation regions of a second conductivity type in the substrate while forming the collector region. A collector region of a first conductivity type is then formed in the substrate for the other of the complementary transistors. The collector region for the other complementary transis- tor is formed within at least one other isolation region. An epitaxial layer of semiconductor material doped with ions of the first conductivity type is then formed on the surface of the substrate. To provide improved PNP transistor performance, the P-type emitter for the PNP transistor is formed prior to a last drive-in treatment by forming a polycrystalline silicon layer on the exposed surface of the base. The polycrystalline silicon is doped with a P-type dopant. Thereafter the transistor structure is subjected to conditions whereby the doping ions contained in the polycrystalline silicon layer are driven into the epitaxial layer to provide a shallow emitter region without effecting disloca- tions in the silicon lattice of the epitaxial layer. FI 9-79-077

365496

LandOfFree

Say what you really think

Search LandOfFree.com for Canadian inventors and patents. Rate them and share your experience with other people.

Rating

Complementary transistor structure and method for manufacture does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Complementary transistor structure and method for manufacture, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Complementary transistor structure and method for manufacture will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFCA-PAI-O-1164818

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.