Computer memory management system

G - Physics – 06 – F

Patent

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354/237

G06F 12/06 (2006.01)

Patent

CA 1234224

ABSTRACT A computer memory management system for detecting the presence of memory chips connected to predetermined memory banks of a plurality of memory modules in a computer system, receiving and remapping address signals, and contiguously enabling the predetermined memory banks in response thereto. A programmable logic array generates enable signals for enabling the predetermined memory banks of the memory modules in response to receiving address and control signals from a main controller. The remapping process is performed during power Up such that no wait states are introduced during subsequent memory accesses. The system is self-adaptive and inexpensive.

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