Computer system absent a parallel bus

Details Computer system absent a parallel bus Computer system absent a parallel bus

G - Physics

06

F

G06F 13/40 (2006.01) G06F 1/00 (2006.01) G06F 1/16 (2006.01) G06F 3/00 (2006.01) G06F 13/00 (2006.01) G06F 13/38 (2006.01) G06F 13/42 (2006.01) H05K 1/02 (2006.01) H05K 5/00 (2006.01)

Patent

CA 2344043

The invention is essentially a novel computer architecture which is absent the traditional parallel system bus. The computer makes use of a serial bus controller (SBC) and serial communication lines to facilitate communication between attached system components and any peripheral devices. The components themselves can be in their own enclosures, designed to and will contain BIOS-type information sufficient to characterize themselves and convey any necessary protocol for communicating with themselves. At each system boot different system components such as CPU(s), memory modules, fixed disks, etc. can be added or removed and even while in the powered on state various peripheral devices can be added and removed. This architecture permits infinite combinations of system configurations limited only by the number of available connections to the serial bus controller. Individual components are interconnected via high speed serial data transmission and thus are not subject to the distance limitations imposed by the inherent properties of the parallel system bus.

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