Computer system speed control at continuous processor speed

G - Physics – 06 – F

Patent

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354/231

G06F 9/44 (2006.01) G06F 13/42 (2006.01)

Patent

CA 1296807

ABSTRACT A personal computer is disclosed having a high speed microprocessor which executes in a variety of selectable speed modes to provide greater compatibility with applica- tion programs written for slower speed microprocessors. A logic means is included responsive to the speed select signal which does not change the speed of the micropro- cessor oscillator (clock) but rather changes the length of a wait state or "STOP" state of the microprocessor. The "STOP" state of the microprocessor is varied by varying the time delay setting of a one-shot timer. The one-shot timer keeps the "STOP" request active and therefore keeps the microprocessor (CPU) from running bus cycles (execut- ing code) until the timer times out thereby releasing the CPU STOP. By varying the length of the time delay of the one-shot timer, which halts the execution of bus cycles (code), the microprocessor simulates microprocessor speed changes which have the appearance of earlier generation computer with older microprocessors. The computer and software disclosed enhances compatibility of a faster microprocessor with older applications programs written for slower microprocessor without varying the micropro- cessor clock rate.

545944

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